10 search results - page 2 / 2 » Performance Analysis of General Cut-Through Switching on Buf... |
IPPS
2003
IEEE
14 years 19 days ago
2003
IEEE
With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
LATIN
1998
Springer
13 years 11 months ago
1998
Springer
We study the performance of packet routing on arrays (or meshes) with bounded buffers in the routing switches, assuming that new packets are continuously inserted at all the nodes....
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors ...
MMB
2010
Springer
14 years 3 days ago
2010
Springer
Abstract. Computing tight performance bounds in feed-forward networks under general assumptions about arrival and server models has turned out to be a challenging problem. Recently...
SIGCOMM
2004
ACM
14 years 23 days ago
2004
ACM
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...