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ICS
2009
Tsinghua U.
14 years 3 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 3 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
ICPP
2009
IEEE
13 years 6 months ago
Mediacoop: Hierarchical Lookup for P2P-VoD Services
The random seeking in P2P-VoD system requires efficient lookup for "good" suppliers. The main challenge is that good suppliers should meet two requirements: "conten...
Tieying Zhang, Jianming Lv, Xueqi Cheng
CLUSTER
2004
IEEE
14 years 22 days ago
An efficient end-host architecture for cluster communication
Cluster computing environments built from commodity hardware have provided a cost-effective solution for many scientific and high-performance applications. Likewise, middleware te...
Xin Qi, Gabriel Parmer, Richard West
BMCBI
2005
130views more  BMCBI 2005»
13 years 9 months ago
Squid - a simple bioinformatics grid
Background: BLAST is a widely used genetic research tool for analysis of similarity between nucleotide and protein sequences. This paper presents a software application entitled &...
Paulo C. Carvalho, Rafael V. Glória, Antoni...