This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Shared memory in a parallel computer provides prowith the valuable abstraction of a shared address space--through which any part of a computation can access any datum. Although un...
We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run...
This paper describes our early experiences with a preproduction Cray XMT system that implements a scalable shared memory architecture with hardware support for multithreading. Unl...
The continuing miniaturization of technology coupled with wireless networks has made it feasible to physically embed sensor network systems into the environment. Sensor net proces...