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SIPS
2007
IEEE
15 years 8 months ago
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
CAV
2007
Springer
118views Hardware» more  CAV 2007»
15 years 8 months ago
Local Proofs for Global Safety Properties
This paper explores the concept of locality in proofs of global safety properties of asynchronously composed, multi-process programs. Model checking on the full state space is ofte...
Ariel Cohen 0002, Kedar S. Namjoshi
98
Voted
TSD
2007
Springer
15 years 8 months ago
Pitch Marks at Peaks or Valleys?
Abstract. This paper deals with the problem of speech waveform polarity. As the polarity of speech waveform can influence the performance of pitch marking algorithms (see Sec. 4),...
Milan Legát, Daniel Tihelka, Jindrich Matou...
132
Voted
DSN
2006
IEEE
15 years 8 months ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
106
Voted
IOLTS
2006
IEEE
84views Hardware» more  IOLTS 2006»
15 years 8 months ago
An Improved Technique for Reducing False Alarms Due to Soft Errors
A significant fraction of soft errors in modern microprocessors has been reported to never lead to a system failure. Any concurrent error detection scheme that raises alarm every ...
Sandip Kundu, Ilia Polian