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CGO
2005
IEEE
15 years 8 months ago
SWIFT: Software Implemented Fault Tolerance
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
George A. Reis, Jonathan Chang, Neil Vachharajani,...
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
15 years 7 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
DSN
2003
IEEE
15 years 7 months ago
ICR: In-Cache Replication for Enhancing Data Cache Reliability
Processor caches already play a critical role in the performance of today’s computer systems. At the same time, the data integrity of words coming out of the caches can have ser...
Wei Zhang 0002, Sudhanva Gurumurthi, Mahmut T. Kan...
ICTAI
2003
IEEE
15 years 7 months ago
Parallel Mining of Maximal Frequent Itemsets from Databases
In this paper, we propose a parallel algorithm for mining maximal frequent itemsets from databases. A frequent itemset is maximal if none of its supersets is frequent. The new par...
Soon Myoung Chung, Congnan Luo
121
Voted
COLCOM
2009
IEEE
15 years 7 months ago
DiSK: A distributed shared disk cache for HPC environments
Abstract—Data movement within high performance environments can be a large bottleneck to the overall performance of programs. With the addition of continuous storage and usage of...
Brandon Szeliga, Tung Nguyen, Weisong Shi