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» Performance Evaluation of Memory Caches in Multiprocessors
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SIES
2008
IEEE
14 years 1 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
LCR
1998
Springer
104views System Software» more  LCR 1998»
13 years 11 months ago
Locality Enhancement for Large-Scale Shared-Memory Multiprocessors
Abstract. This paper gives an overview of locality enhancement techniques used by the Jasmine compiler, currently under development at the University of Toronto. These techniques e...
Tarek S. Abdelrahman, Naraig Manjikian, Gary Liu, ...
PDPTA
1996
13 years 8 months ago
Evaluation of Dynamic Data Distributions on NUMA Shared Memory Multiprocessors
Dynamic data distributions offer a number of performance benefits, but require more sophisticated compiler support and incur run-time overhead. We investigate attainable benefits ...
Tarek S. Abdelrahman, Kenneth L. Ma
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
13 years 11 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
ISCA
2005
IEEE
181views Hardware» more  ISCA 2005»
14 years 1 months ago
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishn...