472 search results - page 33 / 95 » Performance Evaluation of Memory Caches in Multiprocessors |
CDES
2008
13 years 9 months ago
2008
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
SIPEW
2009
Springer
14 years 3 days ago
2009
Springer
Abstract. The excellent performance of the contemporary x86 processors is partially due to the complexity of their memory architecture, which therefore plays a role in performance ...
ICPP
1998
IEEE
13 years 11 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
RTAS
2006
IEEE
2006
IEEE
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
14 years 1 months ago
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
DSN
2006
IEEE
14 years 1 months ago
2006
IEEE
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...