Sciweavers

472 search results - page 65 / 95
» Performance Evaluation of Memory Caches in Multiprocessors
Sort
View
CGO
2007
IEEE
14 years 3 months ago
Ubiquitous Memory Introspection
Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to atta...
Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, ...
HPCA
2008
IEEE
14 years 9 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
ICPP
2006
IEEE
14 years 2 months ago
Data Transfers between Processes in an SMP System: Performance Study and Application to MPI
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
Darius Buntinas, Guillaume Mercier, William Gropp
KDD
1998
ACM
122views Data Mining» more  KDD 1998»
14 years 28 days ago
Memory Placement Techniques for Parallel Association Mining
Many data mining tasks (e.g., Association Rules, Sequential Patterns) use complex pointer-based data structures (e.g., hash trees) that typically suffer from sub-optimal data loca...
Srinivasan Parthasarathy, Mohammed Javeed Zaki, We...
ICS
1999
Tsinghua U.
14 years 1 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...