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» Performance Evaluation of Memory Caches in Multiprocessors
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MSS
2003
IEEE
151views Hardware» more  MSS 2003»
14 years 2 months ago
Accurate Modeling of Cache Replacement Policies in a Data Grid
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...
Ekow J. Otoo, Arie Shoshani
VLDB
2004
ACM
143views Database» more  VLDB 2004»
14 years 2 months ago
Clotho: Decoupling memory page layout from storage organization
As database application performance depends on the utilization of the memory hierarchy, smart data placement plays a central role in increasing locality and in improving memory ut...
Minglong Shao, Jiri Schindler, Steven W. Schlosser...
IPPS
2007
IEEE
14 years 3 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
ICPP
2006
IEEE
14 years 2 months ago
A Parallel External-Memory Frontier Breadth-First Traversal Algorithm for Clusters of Workstations
— This paper presents a parallel external-memory algorithm for performing a breadth-first traversal of an implicit graph on a cluster of workstations. The algorithm is a paralle...
Robert Niewiadomski, José Nelson Amaral, Ro...