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TC
2011
13 years 2 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
CHES
2005
Springer
111views Cryptology» more  CHES 2005»
14 years 1 months ago
Hardware Acceleration of the Tate Pairing in Characteristic Three
Although identity based cryptography offers many functional advantages over conventional public key alternatives, the computational costs are significantly greater. The core comp...
Philipp Grabher, Dan Page
CPHYSICS
2010
135views more  CPHYSICS 2010»
13 years 7 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
IMC
2010
ACM
13 years 5 months ago
Comparing and improving current packet capturing solutions based on commodity hardware
Capturing network traffic with commodity hardware has become a feasible task: Advances in hardware as well as software have boosted off-the-shelf hardware to performance levels th...
Lothar Braun, Alexander Didebulidze, Nils Kammenhu...
TABLETOP
2007
IEEE
14 years 1 months ago
Reading Revisited: Evaluating the Usability of Digital Display Surfaces for Active Reading Tasks
A number of studies have shown that paper holds several advantages over computers for reading tasks. However, these studies were carried out several years ago, and since that time...
Meredith Ringel Morris, A. J. Bernheim Brush, Bria...