Sciweavers

112 search results - page 12 / 23
» Performance Implications of Cache Affinity on Multicore Proc...
Sort
View
CC
2008
Springer
144views System Software» more  CC 2008»
13 years 9 months ago
Control Flow Emulation on Tiled SIMD Architectures
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
Ghulam Lashari, Ondrej Lhoták, Michael McCo...
OOPSLA
2010
Springer
13 years 5 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
ACMMSP
2006
ACM
232views Hardware» more  ACMMSP 2006»
14 years 1 months ago
Implicit and explicit optimizations for stencil computations
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
Shoaib Kamil, Kaushik Datta, Samuel Williams, Leon...
ENTCS
2007
114views more  ENTCS 2007»
13 years 7 months ago
Parametric Performance Contracts for Software Components with Concurrent Behaviour
Performance prediction methods for component-based software systems aim at supporting design decisions of software architects during early development stages. With the increased a...
Jens Happe, Heiko Koziolek, Ralf Reussner
ISSAC
2009
Springer
155views Mathematics» more  ISSAC 2009»
14 years 2 months ago
Parallel sparse polynomial multiplication using heaps
We present a high performance algorithm for multiplying sparse distributed polynomials using a multicore processor. Each core uses a heap of pointers to multiply parts of the poly...
Michael B. Monagan, Roman Pearce