481 search results - page 21 / 97 » Performance Modeling and Measurement of Parallelized Code fo... |
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
EUROPAR
1997
Springer
13 years 11 months ago
1997
Springer
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
HPCA
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper compares the performance of hierarchical ring- and mesh-connected wormhole routed shared memory multiprocessor networks in a simulation study. Hierarchical rings are in...
ISHPC
2003
Springer
14 years 22 days ago
2003
Springer
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...