Sciweavers

260 search results - page 42 / 52
» Performance Modelling and Optimization of Memory Access on C...
Sort
View
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 22 days ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
ACMMSP
2004
ACM
101views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Metrics and models for reordering transformations
Irregular applications frequently exhibit poor performance on contemporary computer architectures, in large part because of their inefficient use of the memory hierarchy. Runtime ...
Michelle Mills Strout, Paul D. Hovland
GECCO
2005
Springer
204views Optimization» more  GECCO 2005»
14 years 1 months ago
Modeling systems with internal state using evolino
Existing Recurrent Neural Networks (RNNs) are limited in their ability to model dynamical systems with nonlinearities and hidden internal states. Here we use our general framework...
Daan Wierstra, Faustino J. Gomez, Jürgen Schm...
PPOPP
1997
ACM
13 years 11 months ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
MSS
2003
IEEE
151views Hardware» more  MSS 2003»
14 years 27 days ago
Accurate Modeling of Cache Replacement Policies in a Data Grid
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...
Ekow J. Otoo, Arie Shoshani