6709 search results - page 105 / 1342 » Performance Modelling of the Computational Hardware: A Stati... |
108
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ISCA
1989
IEEE
15 years 8 months ago
1989
IEEE
Pipelining has become a common technique to increase throughput of the instruction fetch, instruction decode, and instruction execution portions of modern computers. Branch instru...
132
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ARC
2010
Springer
15 years 7 months ago
2010
Springer
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...
141
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ECML
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. Statistical debugging uses machine learning to model program failures and help identify root causes of bugs. We approach this task using a novel Delta-Latent-Dirichlet-Al...
131
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ICIP
2006
IEEE
16 years 5 months ago
2006
IEEE
In this paper, we propose a light and fast pixel-based statistical motion detection method based on a background subtraction procedure. The statistical representation of the backg...
138
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
Scale-out approach, in contrast to scale-up approach (exploring increasing performance by utilizing more powerful shared-memory servers), refers to deployment of applications on a...