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ISQED
2002
IEEE
126views Hardware» more  ISQED 2002»
14 years 15 days ago
Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-...
MOBICOM
1999
ACM
13 years 12 months ago
Optimizing the End-to-End Performance of Reliable Flows Over Wireless Links
We present the results of a performance evaluation of link layer error recovery over wireless links. Our analysis is based upon a case study of the circuit-switched data service i...
Reiner Ludwig, Almudena Konrad, Anthony D. Joseph
NIPS
2007
13 years 9 months ago
Hierarchical Penalization
Hierarchical penalization is a generic framework for incorporating prior information in the fitting of statistical models, when the explicative variables are organized in a hiera...
Marie Szafranski, Yves Grandvalet, Pierre Morizet-...
ICDE
1998
IEEE
153views Database» more  ICDE 1998»
14 years 9 months ago
Flattening an Object Algebra to Provide Performance
Algebraic transformation and optimization techniques have been the method of choice in relational query execution, but applying them in OODBMS is difficult due to the complexity o...
Peter A. Boncz, Annita N. Wilschut, Martin L. Kers...
CORR
2007
Springer
155views Education» more  CORR 2007»
13 years 7 months ago
Low-density graph codes that are optimal for source/channel coding and binning
We describe and analyze the joint source/channel coding properties of a class of sparse graphical codes based on compounding a low-density generator matrix (LDGM) code with a low-...
Martin J. Wainwright, Emin Martinian