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IEEEPACT
2000
IEEE
14 years 1 days ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
HIPC
2009
Springer
13 years 5 months ago
Optimizing the use of GPU memory in applications with large data sets
Abstract--With General Purpose programmable GPUs becoming more and more popular, automated tools are needed to bridge the gap between achievable performance from highly parallel ar...
Nadathur Satish, Narayanan Sundaram, Kurt Keutzer
ISCA
1998
IEEE
108views Hardware» more  ISCA 1998»
13 years 12 months ago
Pipeline Gating: Speculation Control for Energy Reduction
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
Srilatha Manne, Artur Klauser, Dirk Grunwald
ICPP
2009
IEEE
14 years 2 months ago
Broker Selection Strategies in Interoperable Grid Systems
—The increasing demand for resources of the high performance computing systems has led to new forms of collaboration of distributed systems such as interoperable grid systems tha...
Ivan Rodero, Francesc Guim, Julita Corbalán...
HPDC
2000
IEEE
14 years 2 days ago
An Evaluation of Alternative Designs for a Grid Information Service
Computational grids consisting of large and diverse sets of distributed resources have recently been adopted by organizations such as NASA and the NSF. One key component of a comp...
Warren Smith, Abdul Waheed, David Meyers, Jerry C....