3567 search results - page 116 / 714 » Performance Prediction and Its Use in Parallel and Distribut... |
ICS
1999
Tsinghua U.
14 years 13 days ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
HPCC
2009
Springer
14 years 23 days ago
2009
Springer
Abstract—In this paper, a novel architecture for a streaming intrusion detection system for Grid computing environments is presented. Detection mechanisms based on traditional lo...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes, for the FPGA-based embedded systems, a reliability-aware process scheduling strategy that operates under performance bounds. A unique characteristic of the pr...
ICPPW
1999
IEEE
14 years 14 days ago
1999
IEEE
A new method for updating certificate revocation trees (CRT) is proposed. Efficient revocation of publickey certificates is a current issue in public-key Infrastructure because a ...
PVG
2003
IEEE
14 years 1 months ago
2003
IEEE
While commodity computing and graphics hardware has increased in capacity and dropped in cost, it is still quite difficult to make effective use of such systems for general-purpos...