317 search results - page 13 / 64 » Performance Studies of Shared-Nothing Parallel Transaction P... |
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
HPCA
2000
IEEE
14 years 9 hour ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
IJCSA
2008
13 years 7 months ago
2008
It is well known that transactional and analytical systems each require different database architecture. In general, the database structure of transactional systems is optimized f...
CCGRID
2011
IEEE
12 years 11 months ago
2011
IEEE
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...