372 search results - page 27 / 75 » Performance Studies of a Parallel Prolog Architecture |
ASAP
2008
IEEE
14 years 3 months ago
2008
IEEE
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
We show that timed automata can be used to model and to analyze timeliness properties of embedded system architectures. Using a case study inspired by industrial practice, we pres...
IPPS
2008
IEEE
14 years 2 months ago
2008
IEEE
An architectural framework is studied that can perform dynamic reconfiguration. A basic objective is to dynamically reconfigure the architecture so that its configuration is well ...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...