1709 search results - page 292 / 342 » Performance Visualization and Exploration for Reconfigurable... |
SPAA
2010
ACM
14 years 16 days ago
2010
ACM
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
DCC
2000
IEEE
14 years 3 days ago
2000
IEEE
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...
ISORC
2000
IEEE
14 years 3 days ago
2000
IEEE
There have been many debates about the feasibility of providing guaranteed Quality of Service (QoS) when network traffic travels beyond the enterprise domain and into the vast unk...
CHI
2000
ACM
14 years 2 days ago
2000
ACM
Interfaces based on recognition technologies are used extensively in both the commercial and research worlds. But recognizers are still error-prone, and this results in human perf...
CONCUR
1999
Springer
13 years 12 months ago
1999
Springer
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...