Sciweavers

1370 search results - page 109 / 274
» Performance analysis and optimization of latency insensitive...
Sort
View
SIROCCO
1998
15 years 5 months ago
The counting pyramid: an adaptive distributed counting scheme
A distributed counter is a concurrent object which provides a fetch-and-increment operation on a shared value. On the basis of a distributed counter, one can implement various fun...
Roger Wattenhofer, Peter Widmayer
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
179
Voted
SPAA
1996
ACM
15 years 8 months ago
From AAPC Algorithms to High Performance Permutation Routing and Sorting
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Thomas Stricker, Jonathan C. Hardwick
GECCO
2009
Springer
150views Optimization» more  GECCO 2009»
15 years 10 months ago
Integrating real-time analysis with the dendritic cell algorithm through segmentation
As an immune inspired algorithm, the Dendritic Cell Algorithm (DCA) has been applied to a range of problems, particularly in the area of intrusion detection. Ideally, the intrusio...
Feng Gu, Julie Greensmith, Uwe Aickelin
EUROPAR
2004
Springer
15 years 9 months ago
Improving Data Cache Performance via Address Correlation: An Upper Bound Study
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
Peng-fei Chuang, Resit Sendag, David J. Lilja