114 search results - page 16 / 23 » Performance and Overhead in a Hybrid Reconfigurable Computer |
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
PRDC
2007
IEEE
14 years 1 months ago
2007
IEEE
Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures mus...
ICIP
1995
IEEE
14 years 8 months ago
1995
IEEE
Modern video applications call for computationally intensive data processing at very high data rate. In order to meet the high-performance/low-cost constraints, the stateof-the-ar...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
The power-efficient massively parallel Graphics Processing Units (GPUs) have become increasingly influential for scientific computing over the past few years. However, their ef...
IFIP
1998
Springer
13 years 11 months ago
1998
Springer
This paper presents a hybrid approach to automatic parallelization of computer programs which combines static extraction of threads (tasks) with dynamic scheduling for parallel an...