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RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
14 years 2 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
ACSAC
2000
IEEE
14 years 4 days ago
The Chinese Remainder Theorem and its Application in a High-Speed RSA Crypto Chip
The performance of RSA hardware is primarily determined by an efficient implementation of the long integer modular arithmetic and the ability to utilize the Chinese Remainder The...
Johann Großschädl
SBACPAD
2003
IEEE
121views Hardware» more  SBACPAD 2003»
14 years 1 months ago
Optimizing Packet Capture on Symmetric Multiprocessing Machines
Traffic monitoring and analysis based on general purpose systems with high speed interfaces, such as Gigabit Ethernet and 10 Gigabit Ethernet, requires carefully designed software...
Gianluca Varenni, Mario Baldi, Loris Degioanni, Fu...
ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
13 years 6 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...
SENSYS
2003
ACM
14 years 29 days ago
Differentiated surveillance for sensor networks
For many sensor network applications such as military surveillance, it is necessary to provide full sensing coverage to a security-sensitive area while at the same time minimizing...
Ting Yan, Tian He, John A. Stankovic