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IPPS
2006
IEEE
14 years 1 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 1 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
AINA
2008
IEEE
14 years 2 months ago
ETSP: An Energy-Efficient Time Synchronization Protocol for Wireless Sensor Networks
Wireless Sensor Networks (WSN) have specific constraints and stringent requirements in contrast to traditional wired and wireless computer networks. Among these specific requireme...
Khurram Shahzad, Arshad Ali, N. D. Gohar
CONCURRENCY
2010
130views more  CONCURRENCY 2010»
13 years 7 months ago
Enabling high-speed asynchronous data extraction and transfer using DART
As the complexity and scale of current scientific and engineering applications grow, managing and transporting the large amounts of data they generate is quickly becoming a signif...
Ciprian Docan, Manish Parashar, Scott Klasky
DSRT
2008
IEEE
14 years 2 months ago
An Adaptive Energy-Conserving Strategy for Parallel Disk Systems
In the past decade parallel disk systems have been highly scalable and able to alleviate the problem of disk I/O bottleneck, thereby being widely used to support a wide range of d...
Mais Nijim, Adam Manzanares, Xiao Qin