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TVLSI
2002
97views more  TVLSI 2002»
13 years 7 months ago
Techniques for energy-efficient communication pipeline design
The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another...
Gang Qu, Miodrag Potkonjak
CIKM
2007
Springer
14 years 1 months ago
Optimizing parallel itineraries for knn query processing in wireless sensor networks
Spatial queries for extracting data from wireless sensor networks are important for many applications, such as environmental monitoring and military surveillance. One such query i...
Tao-Young Fu, Wen-Chih Peng, Wang-Chien Lee
HPCA
1996
IEEE
13 years 11 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
DAC
2005
ACM
13 years 9 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
14 years 1 months ago
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jun...