121 search results - page 10 / 25 » Performance evaluation for system-on-chip architectures usin... |
DATE
2010
IEEE
14 years 20 days ago
2010
IEEE
Abstract—We present a set of modeling constructs accompanied by a high performance simulation kernel for accuracy adaptive transaction level models. In contrast to traditional, ï...
NETWORKING
2004
13 years 9 months ago
2004
This paper performs a comparative evaluation of two QoS architectures, RSVP Reservation Aggregation and Scalable ReservationBased QoS, aimed at providing QoS levels similar to the ...
MOBICOM
2004
ACM
14 years 1 months ago
2004
ACM
In this paper we conduct a feasibility study of delay-critical safety applications over vehicular ad hoc networks based on the emerging dedicated short range communications (DSRC)...
DTJ
1998
13 years 7 months ago
1998
ir increasing use of abstraction, modularity, delayed binding, polymorphism, and source reuse, especially when these attributes are used in combination. Modern processor architectu...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...