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JUCS
2000
120views more  JUCS 2000»
13 years 7 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
SIGMETRICS
2008
ACM
128views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
Loss-aware network coding for unicast wireless sessions: design, implementation, and performance evaluation
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...
Shravan K. Rayanchu, Sayandeep Sen, Jianming Wu, S...
SIMULATION
2010
178views more  SIMULATION 2010»
13 years 2 months ago
Application-level Simulation for Network Security
We introduce and describe a novel network simulation tool called NeSSi (Network Security Simulator). NeSSi incorporates a variety of features relevant to network security distingu...
Stephan Schmidt, Rainer Bye, Joël Chinnow, Ka...
TOMACS
1998
140views more  TOMACS 1998»
13 years 7 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
VLDB
1998
ACM
134views Database» more  VLDB 1998»
13 years 11 months ago
Secure Buffering in Firm Real-Time Database Systems
The design of secure buffer managers for database systems supporting real-time applications with firm deadlines is studied here. We first identify the design challenges and then p...
Binto George, Jayant R. Haritsa