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CGO
2005
IEEE
14 years 1 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein
MOBISYS
2004
ACM
14 years 7 months ago
Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
Ting Liu, Christopher M. Sadler, Pei Zhang, Margar...
TOMACS
1998
140views more  TOMACS 1998»
13 years 7 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
CODES
1999
IEEE
13 years 11 months ago
An MPEG-2 decoder case study as a driver for a system level design methodology
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
Pieter van der Wolf, Paul Lieverse, Mudit Goel, Da...
EUROMICRO
1997
IEEE
13 years 11 months ago
HPO: a programming environment for object-oriented metacomputing
Metacomputing is an emergent paradigm that makes possible to distribute applications over a heterogeneous set of computing systems to exploit all available resources. The paper pr...
Antonio Corradi, Letizia Leonardi, Franco Zambonel...