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ISCA
2006
IEEE
187views Hardware» more  ISCA 2006»
14 years 1 months ago
A Case for MLP-Aware Cache Replacement
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu,...
HPCA
2012
IEEE
12 years 3 months ago
Decoupled dynamic cache segmentation
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
Samira Manabi Khan, Zhe Wang, Daniel A. Jimé...
MEMOCODE
2008
IEEE
14 years 1 months ago
Estimating the Performance of Cache Replacement Policies
—Caches are commonly employed to hide the latency gap between memory and the CPU by exploiting locality in memory accesses. The cache performance strongly influences a system’...
Daniel Grund, Jan Reineke
ICS
2004
Tsinghua U.
14 years 26 days ago
Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches
We propose a novel replacement algorithm, called InterReference Gap Distribution Replacement (IGDR), for setassociative secondary caches of processors. IGDR attaches a weight to e...
Masamichi Takagi, Kei Hiraki
IEEEPACT
2002
IEEE
14 years 12 days ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung