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DSN
2005
IEEE
13 years 9 months ago
Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
Moinuddin K. Qureshi, Onur Mutlu, Yale N. Patt
LCPC
2005
Springer
14 years 1 months ago
Interprocedural Symbolic Range Propagation for Optimizing Compilers
Abstract. We have designed and implemented an interprocedural algorithm to analyze symbolic value ranges that can be assumed by variables at any given point in a program. Our algor...
Hansang Bae, Rudolf Eigenmann
TCAD
2008
88views more  TCAD 2008»
13 years 7 months ago
Self-Adaptive Data Caches for Soft-Error Reliability
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
14 years 1 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
CGO
2007
IEEE
14 years 1 months ago
Ubiquitous Memory Introspection
Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to atta...
Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, ...