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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
HIPEAC
2005
Springer
14 years 1 months ago
Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors
Abstract. High end routers are targeted at providing worst case throughput guarantees over latency. Caches on the other hand are meant to help latency not throughput in a tradition...
Bengu Li, Ganesh Venkatesh, Brad Calder, Rajiv Gup...
IPPS
2010
IEEE
13 years 5 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
INFOCOM
2000
IEEE
14 years 1 days ago
An Empirical Evaluation of Client-Side Server Selection Algorithms
—Efficient server selection algorithms reduce retrieval time for objects replicated on different servers and are an important component of Internet cache architectures. This pap...
Sandra G. Dykes, Kay A. Robbins, Clinton L. Jeffer...
GLOBECOM
2008
IEEE
14 years 2 months ago
Evaluating the Performance on ID/Loc Mapping
—Challenges of routing scalability has attracted many research efforts, represented by the works of splitting identifier and locator semantics of IP addresses. A group of identi...
Hong Zhang, Maoke Chen, Yuncheng Zhu