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MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
14 years 3 months ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
VLDB
1999
ACM
151views Database» more  VLDB 1999»
14 years 1 months ago
Cache Conscious Indexing for Decision-Support in Main Memory
As random access memory gets cheaper, it becomes increasingly affordable to build computers with large main memories. We consider decision support workloads within the context of...
Jun Rao, Kenneth A. Ross
IPM
2007
137views more  IPM 2007»
13 years 9 months ago
Analyzing imbalance among homogeneous index servers in a web search system
The performance of parallel query processing in a cluster of index servers is crucial for modern web search systems. In such a scenario, the response time basically depends on the...
Claudine Santos Badue, Ricardo A. Baeza-Yates, Ber...
WWW
2009
ACM
14 years 9 months ago
OpenRuleBench: an analysis of the performance of rule engines
The Semantic Web initiative has led to an upsurge of the interest in rules as a general and powerful way of processing, combining, and analyzing semantic information. Since severa...
Senlin Liang, Paul Fodor, Hui Wan, Michael Kifer
DLOG
2006
13 years 10 months ago
Tableau Caching for Description Logics with Inverse and Transitive Roles
Abstract. Modern description logic (DL) reasoners are known to be less efficient for DLs with inverse roles. The current loss of performance is largely due to the missing applicabi...
Yu Ding, Volker Haarslev