54 search results - page 5 / 11 » Performance evaluation of wormhole routed network processor-... |
MOBICOM
2009
ACM
14 years 1 months ago
2009
ACM
This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to inte...
ASPLOS
2010
ACM
13 years 10 months ago
2010
ACM
We present an all-optical approach to constructing data networks on chip that combines the following key features: (1) Wavelengthbased routing, where the route followed by a packe...
EUROPAR
2009
Springer
14 years 1 months ago
2009
Springer
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...