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» Performance improvement with circuit-level speculation
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PLDI
2004
ACM
14 years 25 days ago
Min-cut program decomposition for thread-level speculation
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykuma...
PLDI
2012
ACM
11 years 10 months ago
Effective parallelization of loops in the presence of I/O operations
Software-based thread-level parallelization has been widely studied for exploiting data parallelism in purely computational loops to improve program performance on multiprocessors...
Min Feng, Rajiv Gupta, Iulian Neamtiu
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
14 years 10 days ago
Timing Analysis of Embedded Software for Speculative Processors
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
Abhik Roychoudhury, Xianfeng Li, Tulika Mitra
VLDB
1995
ACM
94views Database» more  VLDB 1995»
13 years 11 months ago
Value-cognizant Speculative Concurrency Control
We describe SCC-kS, a Speculative Concurrency Control (SCC) algorithm that allows a DBMS to use efficiently the extra computing resources available in the system to increase the l...
Azer Bestavros, Spyridon Braoudakis
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 4 months ago
A Minimal Dual-Core Speculative Multi-Threading Architecture
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman...