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» Performance improvement with circuit-level speculation
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ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 1 months ago
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim...
POPL
1994
ACM
13 years 11 months ago
Reducing Indirect Function call Overhead in C++ Programs
Modern computer architectures increasingly depend on mechanisms that estimate future control flow decisions to increase performance. Mechanisms such as speculative execution and p...
Brad Calder, Dirk Grunwald
ASPLOS
2008
ACM
13 years 9 months ago
Accurate branch prediction for short threads
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...
Bumyong Choi, Leo Porter, Dean M. Tullsen
ICS
2005
Tsinghua U.
14 years 27 days ago
Parallel sparse LU factorization on second-class message passing platforms
Several message passing-based parallel solvers have been developed for general (non-symmetric) sparse LU factorization with partial pivoting. Due to the fine-grain synchronizatio...
Kai Shen
VLSID
2004
IEEE
139views VLSI» more  VLSID 2004»
14 years 7 months ago
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
André Ivanov, Baosheng Wang, Josh Yang