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» Performance improvement with circuit-level speculation
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ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
14 years 2 months ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
VLSID
2005
IEEE
116views VLSI» more  VLSID 2005»
14 years 7 months ago
A Quasi-Delay-Insensitive Method to Overcome Transistor Variation
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...
C. Brej, Jim D. Garside
CGO
2011
IEEE
12 years 11 months ago
Dynamically accelerating client-side web applications through decoupled execution
— The emergence and wide adoption of web applications have moved the client-side component, often written in JavaScript, to the forefront of computing on the web. Web application...
Mojtaba Mehrara, Scott A. Mahlke
APCSAC
2003
IEEE
13 years 11 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
HIPEAC
2009
Springer
14 years 2 months ago
MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor
Abstract. Threads experiencing long-latency loads on a simultaneous multithreading (SMT) processor may clog shared processor resources without making forward progress, thereby star...
Kenzo Van Craeynest, Stijn Eyerman, Lieven Eeckhou...