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» Performance of Hardware Compressed Main Memory
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ICS
1999
Tsinghua U.
14 years 12 days ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
DATE
2005
IEEE
136views Hardware» more  DATE 2005»
14 years 1 months ago
Increasing Register File Immunity to Transient Errors
Transient errors are one of the major reasons for system downtime in many systems. While prior research has mainly focused on the impact of transient errors on datapath, caches an...
Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk
EGH
2004
Springer
14 years 1 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo
SI3D
1995
ACM
13 years 11 months ago
Real-Time Programmable Shading
One of the main techniques used by software renderers to produce stunningly realistic images is programmable shading—executing an arbitrarily complex program to compute the colo...
Anselmo Lastra, Steven Molnar, Marc Olano, Yulan W...
PLDI
2011
ACM
12 years 11 months ago
A case for an SC-preserving compiler
The most intuitive memory consistency model for shared-memory multi-threaded programming is sequential consistency (SC). However, current concurrent programming languages support ...
Daniel Marino, Abhayendra Singh, Todd D. Millstein...