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» Performance of Hardware Compressed Main Memory
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EUROPAR
2009
Springer
14 years 1 days ago
StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
Cédric Augonnet, Samuel Thibault, Raymond N...
HPCA
1998
IEEE
14 years 13 days ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 6 months ago
STEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
Dongyuan Zhan, Hong Jiang, Sharad C. Seth
SIGGRAPH
1999
ACM
14 years 14 days ago
The VolumePro Real-Time Ray-Casting System
This paper describes VolumePro, the world’s first single-chip realtime volume rendering system for consumer PCs. VolumePro implements ray-casting with parallel slice-by-slice p...
Hanspeter Pfister, Jan Hardenbergh, Jim Knittel, H...
IEEEPACT
2009
IEEE
14 years 2 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood