3321 search results - page 24 / 665 » Performance of parallel computations with dynamic processor ... |
110
Voted
HPDC
1995
IEEE
15 years 6 months ago
1995
IEEE
Most algorithms proposed for controlling traffic prior to entering ATM networks are based on static mechanisms. Such static control mechanisms do not account for the dynamics of ...
119
click to vote
IPPS
1999
IEEE
15 years 6 months ago
1999
IEEE
In parallel processing systems, a fundamental consideration is the maximization of system performance through task mapping. A good allocation strategy may improve resource utilizat...
154
Voted
ICS
2007
Tsinghua U.
15 years 8 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
96
Voted
ICMCS
2007
IEEE
15 years 8 months ago
2007
IEEE
The H.264 decoder has a sequential, control intensive front end that makes it difficult to leverage the potential performance of emerging manycore processors. Preparsing is a fun...
146
Voted
HPCA
2012
IEEE
13 years 10 months ago
2012
IEEE
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...