35 search results - page 4 / 7 » Performance of the Cell processor for biomolecular simulatio... |
LANC
2009
ACM
14 years 3 days ago
2009
ACM
We study a wireless network under the 802.11 random access protocol, supporting multiple physical layer rates. Based on models for the effective packet rates achieved at the MAC ...
QEST
2007
IEEE
14 years 1 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
ERSA
2009
13 years 5 months ago
2009
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
PE
2007
Springer
13 years 7 months ago
2007
Springer
To develop simple traffic engineering rules for the downlink of a cellular system using Proportional Fairness (PF) scheduling, we study the “strict” and “approximate” ins...
EH
1999
IEEE
13 years 11 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...