119 search results - page 3 / 24 » Performance optimization of elastic systems using buffer res... |
AUTOMATICA
2008
13 years 7 months ago
2008
This paper studies a general dynamic buffer management problem with one buffer inserted between two interacting components. The component to be controlled is assumed to have multi...
NSDI
2010
13 years 9 months ago
2010
We show how to build cheap and large CAMs, or CLAMs, using a combination of DRAM and flash memory. These are targeted at emerging data-intensive networked systems that require mas...
ENTCS
2008
13 years 7 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
TCAD
2008
13 years 7 months ago
2008
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Many large-scale production applications often have very long executions times and require periodic data checkpoints in order to save the state of the computation for program rest...