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EMSOFT
2007
Springer
14 years 1 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou
ICESS
2007
Springer
14 years 1 months ago
An Efficient Buffer Management Scheme for Implementing a B-Tree on NAND Flash Memory
Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, lo...
Hyun-Seob Lee, Sangwon Park, Ha-Joo Song, Dong-Ho ...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 4 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein
ASAP
2006
IEEE
134views Hardware» more  ASAP 2006»
13 years 9 months ago
Buffer and register allocation for memory space optimization
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha...
MICRO
2008
IEEE
111views Hardware» more  MICRO 2008»
14 years 1 months ago
Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
Livio Soares, David K. Tam, Michael Stumm