955 search results - page 185 / 191 » Performance optimization of multiple memory architectures fo... |
RTSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
VEE
2009
ACM
14 years 2 months ago
2009
ACM
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
SPAA
1993
ACM
13 years 11 months ago
1993
ACM
In this paper we introduce the ConSet communication model for distributed memory parallel computers. The communication needs of an application program can be satisfied by some ar...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
MOBIWAC
2009
ACM
14 years 2 months ago
2009
ACM
Rapid evolution of wireless networking has provided wide-scale of different wireless access technologies like Bluetooth, ZigBee, 802.11a/b/g, DSRC, 3G UMTS, LTE, WiMAX, etc. The c...