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» Performance under Failures of DAG-based Parallel Computing
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IEEEPACT
2006
IEEE
14 years 1 months ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
DAC
2005
ACM
14 years 8 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
WAIM
2007
Springer
14 years 1 months ago
A New DBMS Architecture for DB-IR Integration
Nowadays, as there is an increasing need to integrate the DBMS (for structured data) with Information Retrieval (IR) features (for unstructured data), DB-IR integration becomes one...
Kyu-Young Whang
MOBICOM
2003
ACM
14 years 18 days ago
Topology control for wireless sensor networks
We consider a two-tiered Wireless Sensor Network (WSN) consisting of sensor clusters deployed around strategic locations and base-stations (BSs) whose locations are relatively fl...
Jianping Pan, Yiwei Thomas Hou, Lin Cai, Yi Shi, S...
MIDDLEWARE
2009
Springer
13 years 12 months ago
Automatic Stress Testing of Multi-tier Systems by Dynamic Bottleneck Switch Generation
Abstract. The performance of multi-tier systems is known to be significantly degraded by workloads that place bursty service demands on system resources. Burstiness can cause queu...
Giuliano Casale, Amir Kalbasi, Diwakar Krishnamurt...