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PLDI
2003
ACM
14 years 22 days ago
Taming the IXP network processor
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
Lal George, Matthias Blume
ISORC
2011
IEEE
12 years 11 months ago
A Time-Predictable Object Cache
—Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is...
Martin Schoeberl
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 5 months ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
ICPP
1993
IEEE
13 years 11 months ago
Closed Form Solutions for Bus and Tree Networks of Processors Load Sharing A Divisible Job
Optimal load allocation for load sharing a divisible job over processors interconnected in either a bus or a tree network is considered. The processors are either equipped with fro...
Sameer M. Bataineh, Te-Yu Hsiung, Thomas G. Robert...
TVLSI
2002
94views more  TVLSI 2002»
13 years 7 months ago
A network flow approach to memory bandwidth utilization in embedded DSP core processors
This paper presents a network flow approach to solving the register binding and allocation problem for multiword memory access DSP processors. In recently announced DSP processors,...
Catherine H. Gebotys