In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
The Loop-Level Process Control LLPC policy 9 dynamically adjusts the number of threads an application is allowed to execute based on the application's available parallelism a...
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Abstract. We give processor-allocation algorithms for grid architectures, where the objective is to select processors from a set of available processors to minimize the average num...
Michael A. Bender, David P. Bunde, Erik D. Demaine...
In parallel adaptive mesh refinement (AMR) computations the problem size can vary significantly during a simulation. The goal here is to explore the performance implications of dyn...