Sciweavers

316 search results - page 60 / 64
» Period and Deadline Selection for Schedulability in Real-Tim...
Sort
View
RTSS
2003
IEEE
14 years 22 days ago
A Dynamic Voltage Scaling Algorithm for Sporadic Tasks
Dynamic voltage scaling (DVS) algorithms save energy by scaling down the processor frequency when the processor is not fully loaded. Many algorithms have been proposed for periodi...
Ala' Qadi, Steve Goddard, Shane Farritor
RTCSA
2000
IEEE
13 years 12 months ago
Frame packing in real-time communication
A common computational model in distributed embedded systems is that the nodes exchange signals via a network. Most often a signal represents the state of some physical device and...
Kristian Sandström, Christer Norström, M...
RTAS
2007
IEEE
14 years 1 months ago
Optimizing the FPGA Implementation of HRT Systems
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
Marco Di Natale, Enrico Bini
CDC
2009
IEEE
131views Control Systems» more  CDC 2009»
14 years 6 days ago
Dynamic clock calibration via temperature measurement
— We study a clock calibration problem for an ultra-low power timer on a sensor node platform. When the sensor is put into sleep mode, this timer is the only thing left running, ...
David I. Shuman, Mingyan Liu
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
14 years 7 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu