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FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
14 years 4 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
HASKELL
2009
ACM
14 years 2 months ago
Push-pull functional reactive programming
Functional reactive programming (FRP) has simple and powerful semantics, but has resisted efficient implementation. In particular, most past implementations have used demand-driv...
Conal M. Elliott
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
14 years 2 months ago
Logical Reliability of Interacting Real-Time Tasks
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
ICDE
2007
IEEE
223views Database» more  ICDE 2007»
14 years 2 months ago
Privacy Access Control Model with Location Constraints for XML Services
Information privacy is usually concerned with the confidentiality of personal identifiable information (PII), such as electronic medical records. Nowadays XML services are used to...
Yi Zheng, Yongming Chen, Patrick C. K. Hung
GECCO
2007
Springer
300views Optimization» more  GECCO 2007»
14 years 1 months ago
A NSGA-II, web-enabled, parallel optimization framework for NLP and MINLP
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
David J. Powell, Joel K. Hollingsworth