Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
As an attempt to uncover the topological nature of composition of strategies in game semantics, we present a "topological" game for Multiplicative Additive Linear Logic ...
Using the ideas from current investigations in Knowledge Representation we study the use of a class of logic programs for reasoning about infinite sets. Our programs reason about t...
Douglas A. Cenzer, Jeffrey B. Remmel, Victor W. Ma...
The coincidence between the model-theoretic and the procedural semantics of SLDresolution does not carry over to a Prolog system that also implements non-logical features like cut...
Over the last 25 years there has been considerable body of research into combinations of predicate logic and probability forming what has become known as (perhaps misleadingly) sta...