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» Place and Route for Secure Standard Cell Design
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ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 3 months ago
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design
I/O placement has always been a concern in modern IC design. Due to flip-chip technology, I/O can be placed throughout the whole chip without long wires from the periphery of the...
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzh...
SOSE
2008
IEEE
14 years 1 months ago
A Gateway Design for Message Passing on the SOA Healthcare Platform
Various security and privacy issues have emerged from the SOA healthcare platform. Large amounts of personal data are transmitted daily through the SOA healthcare platform. For se...
Chi-Lu Yang, Yeim-Kuan Chang, Chih-Ping Chu
SIGMETRICS
2006
ACM
104views Hardware» more  SIGMETRICS 2006»
14 years 20 days ago
Modeling adoptability of secure BGP protocols
Despite the existence of several secure BGP routing protocols, there has been little progress to date on actual adoption. Although feasibility for widespread adoption remains the ...
Haowen Chan, Debabrata Dash, Adrian Perrig, Hui Zh...
CHES
2005
Springer
100views Cryptology» more  CHES 2005»
14 years 7 days ago
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...
Thomas Popp, Stefan Mangard
ISLPED
2007
ACM
97views Hardware» more  ISLPED 2007»
13 years 8 months ago
Detailed placement for leakage reduction using systematic through-pitch variation
We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate le...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma